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1994-10-05
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2KB
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47 lines
;---------------------------------------------------------
; A 3-bit down counter built from DFF flip-flops
;---------------------------------------------------------
TITLE 3-bit down counter
CHIP dncntr NFX780_84
PIN 47 clock ;* clock signal for driving counter
PIN [48:51] unused[0:3]
PIN [77:78] unused[4:5]
PIN q[0:2] ;* 3-bit counter output
PIN [34:37] s[0:3] ;* LED segment drivers
PIN [39:41] s[4:6] ;* LED segment drivers
MODULE leddigit( d[0:2]=q[0:2], d3=GND, s[0:6]=s[0:6] )
EQUATIONS
; The following statements make the DFF act like a
; toggle FF because we load it with the inverse of
; what it currently stores. That makes the output
; of this TFF toggle at 1/2 the clock frequency.
q0 := /q0
q0.ACLK = clock
; This is another toggle FF, but this one is
; clocked with the output of the first TFF. That
; makes the output of this TFF toggle at 1/4 of
; the clock frequency.
q1 := /q1
q1.ACLK = q0
; A final TFF whose output toggles at 1/8 the
; clock frequency.
q2 := /q2
q2.ACLK = q1
SIMULATION
VECTOR out := [q2,q1,q0]
TRACE_ON clock out
SETF /clock ; set the clock low
PRLDF /q0 /q1 /q2 ; clear the counter bits to 0
; clock it for awhile to see what it does
FOR i:=0 to 20 DO
BEGIN
CLOCKF clock
END